| Teachers | WATANABE, Hiroyoshi | |
|---|---|---|
| Grade, Semester | Year 3 I/III [Department of Information Science Correspondence Course, Faculty of Science and Engineering] | |
| Category | Special Subjects | |
| Classes | メディア授業 | |
| Elective, Credits | Elective 2credit | |
| Syllabus Number | 4E302 | |
The aim of this course is to help students understand computer systems in both "software" and "hardware" aspects. The computer architecture is an interface of hardware mechanisms and software functions. In this course students will learn computer architecture as required knowledge for software engineers. Students will learn by reading a textbook, taking notes, and taking online quizzes. Some learning contents are not on the textbook.
This course is related to diploma policy 2.
This course aims to provide students with an in-depth understanding of the inner-workings of computers and how to design computer systems.
Upon completion of this course, students will be able to explain concepts and technical terms related to the topics listed below. At a minimum, students will be able to select right explanation for designated technical terms and vice versa.
- The definition of computer architecture.
- Instruction set architecture including principles and memory addressing.
- Machine-level representation of data.
- Control unit architecture including and wired logic, micro programmed control and interrupt control.
- Arithmetic and logic unit architecture.
- Memory architecture including memory hierarchy, cache memory and virtual memory.
- Interface and I/O architecture.
- High-performance computers including parallelization and pipeline.
The criteria for passing are to score 60% points on required online quizzes and final examination. The final grade of students who passed will be calculated according to the following process: final examination 70% and online quizzes 30%. Feedbacks on quizzes are given via LMS.
| Kind | Title | Author | Publisher |
|---|---|---|---|
| Textbook | Computer Architecture (4th edition) | Takanobu Baba, | Ohmsha 2016 ISBN978-4-274-21984-9 |
| References |
In-class and out-of-class learning can not be distinguished because this subject is a correspondence course. Learning materials are provided via LMS. Students are expected to learn according to the directions on LMS. Learning activities on each class will take about 4 hours and a half.
The course is conducted in Japanese.
| 1 | Introduction and history of architecture. |
| 2 | Basic configuration and principle of computer. |
| 3 | Evaluation of architecture. |
| 4 | Instruction-set architecture and addressing. |
| 5 | Expression of decimal number and character in computer. |
| 6 | Expression of non-numeric data and design policy of instruction sets. |
| 7 | General-purpose computer and control architecture. |
| 8 | Details of control architecture. |
| 9 | Interrupt. |
| 10 | Arithmetic operation (adder, subtractor and shifter). |
| 11 | Arithmetic operation (multiplication and division). |
| 12 | Memory architecture and cache memory. |
| 13 | Virtual memory. |
| 14 | Parallel processing and pipeline. |
| 15 | Review of the course and preparation for final examination. |
