Teachers | OGAWA, Mitsuhiro | |
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Grade, Semester | Year 3 2nd semest [Department of Information and Electronic Engineering, Faculty of Science and Engineering] | |
Category | Special Subjects | |
Elective, Credits | Elective 1credit | |
Syllabus Number | 3E329 |
The main aims of this course are to know the importance of hardware description language (HDL) and field programmable gate array (FPGA) in the current industry fields including ICT and also manufacturing industry. We will focus on the applied examples rather than theoretical foundations of mathematics by using a development environment of FPGA practically.
This course relates to DP4E.
This course introduces the fundamentals of hardware description language (HDL) and field programmable gate array (FPGA).
By the end of the course, students should be able to do the followings:
1. Recognize and recall major terms and concepts of HDL (especially Verilog HDL).
2. Use a development environment of FPGA.
3. Design simple logic circuit by using FPGA.
4. Recognize terms and concepts of IP core.
Little tests during classes (30%)
Report (70%)
The results will be informed and reviewed mainly via LMS.
Kind | Title | Author | Publisher |
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Textbook | Textbook is not used. Handouts are provided. | ||
References | Japanese book (ISBN: 978-4798063263) | Kobayashi | SHUWA SYSTEM CO., LTD |
References | Japanese book (ISBN: 978-4798045894) | Susutawari | SHUWA SYSTEM CO., LTD |
References | Japanese book (ISBN: 978-4774156514) | Kobayashi | SHUWA SYSTEM CO., LTD |
References | English book (ISBN: 978-1259643767) | Simon Monk | McGraw-Hill Education TAB |
For preparation, 30 min are required for each class in standard. You should read web site instructed in classes.
For review, 60 min are required for each class in standard. Practice questions for review will be distributed in class.
In FPGA programming, students should make their own backups using USB flash drive or portable HDD.
1 | Introduction |
2 | How to use FPGA; practical lesson of development |
3 | Basic of HDL about combinational logic circuit |
4 | FPGA implementation of combinational logic circuit |
5 | Basic of HDL about sequential logic circuit |
6 | FPGA implementation of sequential logic circuit |
7 | IP core; intellectual property core |
8 | Summary and preparation of report |
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